Layout Design, Sr Staff Engineer

As Layout Design Sr Staff Engineer you will contribute in the development of advanced analog integrated circuit designs using best-in-class Synopsys suite of tools. You will be working with local and global teams in developing layout for complex mixed-signal designs in the latest technology nodes. In your role you will be responsible for taking on top-level block ownership with technical understanding and skills. There will be opportunities to act as analog layout technical guide where you will be coordinating with other team members in designing and reviewing layout designs. As a member of our Solutions IP Design Group you will be developing IP in various technology nodes and foundries for different customers in a fast paced and exciting design environment. Remote work is optional for this position. Main Requirements: In depth familiarity with layout of analog and mixed signal CMOS circuits Experience in development of SERDES subcircuit layout (ie. RX, TX, PLL, etc…) Experience in the following layout design techniques: Optimization for signal integrity (ie. clock/data routes, differential routing, shielding) Implementation of ESD design constraints, latch-up risk mitigation Familiarity with custom digital layout (logic cell layout and associated logic path routing) Layout design for reliability (ie. EM, IR, etc…) Design to optimize for parasitic layout effects (ie. matching, reliability, proximity effects) Familiarity in design for porting techniques Full custom analog layout design tool: Custom Compiler (or equivalent) Verification tools: ICV, Calibre, Star-RCXT, PERC Experience in working with Jira/Atlassian (or other such) tools Proven understanding of MS Office Suite of applications Exposure to scripting (ie. TCL, PERL, etc…) Experience: MSEE or BSEE with at least 15 years of related experience. Ability to resolve a wide range of issues in inventive ways. Exercise judgment and partner with others in selecting methods and techniques to obtain solutions. Contribute to complex aspects of a project. Receive little to no instructions on day-to-day work, occasionally receives general instructions on new assignments and projects. Establish and develop approach to solutions. Work is autonomous and collaborative in nature. Provide regular updates to manager on project status. Represent the organization on business unit and/or company-wide projects. Guide more junior peers with aspects of their job. Network with senior internal and external personnel in own area of expertise. Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk. At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. J-18808-Ljbffr

Location: Provincia di Pavia, IT

Posted Date: 11/13/2024